American electrical engineer and supercomputer architect Seymour Cray was born September 28, 1925 in Chippewa Falls, Wisconsin . His father was a civil engineer who fostered Cray’s interest in science and engineering. As early as the age of ten he was able to build a device out of Erector Set components that converted punched paper tape into Morse code signals. The basement of the family home was given over to the young Cray as a “laboratory”. Cray graduated from Chippewa Falls High School in 1943 before being drafted for World War II as a radio operator. He saw action in Europe, and then moved to the Pacific theatre where he worked on breaking Japanese naval codes. On his return to the United States he received a B.Sc. in Electrical Engineering at the University of Minnesota, graduating in 1949. He also was awarded a M.Sc. in applied mathematics in 1951.
In 1951, Cray joined Engineering Research Associates (ERA) in Saint Paul, Minnesota. ERA worked with computer technology and a wide variety of basic engineering too and became an expert on digital computer technology, following his design work on the ERA 1103, the first commercially successful scientific computer.He remained at ERA when it was bought by Remington Rand and then Sperry Corporation in the early 1950s At the newly formed Sperry-Rand, ERA became the “scientific computing” arm of their UNIVAC division.. By 1960 he had completed the design of the CDC 1604, an improved low-cost ERA 1103 that had impressive performance for its price range. Cray also designed its “replacement”, the CDC 6600, which was the first commercial supercomputer,to outperform everything then available by a wide margin, and later released the 5-fold faster CDC 7600
in the middle of the 7600 project, A new Chippewa Lab was set up in his hometown although it does not seem to have delayed the project. After the 7600 shipped, he started development of its replacement, the CDC 8600. It was this project that finally ended his run of successes at CDC in 1972 and Although the 6600 and 7600 had been huge successes in the end, both projects had almost bankrupted the company, and Cray decided to start over fresh with the CDC STAR-100. After an ammicable split Cray he started Cray Research in a new laboratory on the same Chippewa property. After several years of development their first product was released in 1976 as the Cray-1 which easily beat almost every machine in terms of speed, including the STAR-100. In 1976 the first full system was sold to the National Center for Atmospheric Research. Eventually, well over 80 Cray-1s were sold, and the company was a huge success financially.
Next he worked on the Cray-2, while other teams delivered the two-processor Cray X-MP, which was another huge success and later the four-processor X-MP. When the Cray-2 was finally released after six years of development it was only marginally faster than the X-MP. In 1980 he started development on the Cray 3 which was fraught with difficulty, and Cray decided to spin off the Colorado Springs laboratory to form Cray Computer Corporation, taking the Cray-3 project with them, sadly The 500 MHz Cray-3 proved to be Cray’s second major failure. So Cray starting design of the Cray-4 which would run at 1 GHz and outpower other machines. Sadly In 1995 there had been no further sales of the Cray-3, and the ending of the Cold War made it unlikely anyone would buy enough Cray-4s to offer a return on the development funds. The company ran out of money and filed for Chapter 11 bankruptcy March 24, 1995.
Cray then set up a new company, SRC Computers, and started the design of his own massively parallel machine. The new design concentrated on communications and memory performance, the bottleneck that hampered many parallel designs. Design had just started when Cray sadly passed away on October 5, 1996 (age 71) of head and neck injuries suffered in a traffic collision on September 22, 1996. Cray underwent emergency surgery and had been hospitalized since the accident two weeks earlier. SRC Computers carried on development and now specializes in reconfigurable computing.